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CAREER PLAN EXPERT WITNESS Extensive experience in printed circuits and Polymer Thick Film (PTF) electronics with well over 500 articles, papers and tutorials; write columns for two magazines. Recognized historian on printed circuits with extensive prior art files (>100 years). Published 7 books (some used in court cases). On-line patent search and technical analysis expert (was a 3M Information Scientist). Technical proficiency; conferences, RSS feeds (>100), blogs, and subscription search services. Legal Experience Expert consultant for PTF flex circuit producer defending against claims alleging improper design; case dismissed (June 05) based on my product testing, analysis of documents and impeachment of plaintiff’s expert witness. Expert consultant for defense of large cell phone maker in class action suit re: product liability; pending. Evaluating patents for defense of well-known electronics firm sued for patent infringement; pending. Working for plaintiff on patent infringement suit involving electronic sensors; trial in late 2006. Other work involved locating prior art to invalidate patents but also to defend IP. Have extensive US patent (and some European) experience as a prolific inventor; prepared and filed my own provisional and regular patent applications. Good knowledge of patent construction (hold over 33 US patents) and litigation, including infringement and patent invalidation. Subscriber to major technical, IP and litigation RSS feeds/Blogs. Key Areas IP and technical analysis – always up to date via advanced Internet, and personal contact Prior art search, patents and literature; knack for the unobvious connections Product liability, technical assessment and failure analysis; includes class action case experience Technical analysis of patents; experience with infringements and invalidation by discovering prior art Technical literature search, evaluation and analysis; use advanced IEEE and subscription searching Manufacturing process review, analysis and overview Materials selection, identification, selection assessment, failure detection and analysis methods Design review, analysis, flaw detection, especially for electronic assemblies/components Highly skilled in Power Point graphical description and overview simplification Skilled presenter; 25 years of public international speaking; invited speaker at many universities Clear report writing as an established professional author and columnist Own portable digital photomicroscope and have access to several local laboratories EDUCATION PROFESSIONAL ORGANIZATIONS EXTENDED EMPLOYMENT HISTORY
Cookson Electronics R&D, General Technologist: 1997 - 2003 (now a consultant). Responsible for tracking emerging technologies, acquisition analysis, and inventing novel processes/products for all divisions. Presently working on plastic hermetic packaging for MEMS using laser-sealing methods and getters. Alpha Metals (Cookson): 1993 - 1997: Head of R&D, Cookson Semiconductor Packaging Materials. Invented 1st successful strain relief underfill used commercially on Motorola StarTac. Invented wafer-level underfill (7 patents issued). Tessera: 1991 - 1993: R&D Director: set up first R&D lab and pilot line, developed chemistry and processes for CSP. Personally built the first µ-BGA on a very limited budget with used equipment. Poly-Flex Circuits, Inc. (Cookson): 1990 - 1991: Vice President of Technology: developed novel materials and processes for polymer-based (PTF) electronic assemblies. Halogen- and lead-free, no emission circuit and assembly plant. Sheldahl 1982 - 1990: R&D Director: developed innovative processes that became significant commercial successes; they include Novaclad (adhesiveless flex) and Z-Link (high density, interposer type multilayer).
Earlier Employment EXTENDED EXPERIENCE SUMMARY Materials expertise includes formulating, optimizing and characterizing encapsulants, package seals, flip chip underfill, conductive adhesives, UV-cured systems and latent thermoset polymers. Hold the basic patents for novel wafer-level underfill processes and materials. Pending patents cover plastic hermetic packaging, mechanical strength enhancement (drop test), photo-kinetic fiberoptic alignment and, full hermetic wafer-level inorganic chip scale packaging. Productive inventor in printed circuitry, packaging and materials; 3 products received R&D100 Awards; these include High Density Multilayer, Adhesiveless Flex and Chip Scale Packaging (CSP). Holder of at least 29 US patents; received 7 US patents in 2001; several unusual MEMS patent applications are pending. Recognized expert in several areas: Flexible Circuitry and Electronic Materials, Electronic Packaging (CSP, Flip Chip, MEMS and MOEMS). Awarded Atomic Giant 2000 - one of the most influential people in printed circuit industry. Invited expert for conference panels and keynote presenter. Invited speaker/lecturer: Royal Institute of Sweden, Hong-Kong Productivity Council, Uppsula U., MIT, IFV (Sweden), Tech. U. Berlin, Orebro U., RIT, IMEGO (Sweden), DELTA (Denmark), WPI, Chalmers Technical University, National Physics Laboratory (UK). Present about 12 technical workshops/tutorials each year. Technical Areas
INTERESTS STRENGTHS Extraordinary energy and stamina with focus; intensely results-oriented. High enthusiasm; problems are great opportunities to learn and succeed. Able to catalyze enthusiasm and confidence in others. Quickly see and explain the "big picture", but zoom in on details as required. Worldwide networking; 100’s of associates at companies, universities and institutes; my personal database (ACT 2000) has over 5,000 entries. Extreme creativity; aptitude for recognizing the simplest solution before it becomes obvious. Able to see unlikely and unusual relationships and fit them together. Now filing about 10 patents per year. |
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